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authorWeijun Yang <york.yang@csr.com>2015-10-04 12:04:12 +0000
committerUlf Hansson <ulf.hansson@linaro.org>2015-10-26 16:00:04 +0100
commit9faac7b95ea4f9e83b7a914084cc81ef1632fd91 (patch)
treeaa9a844b17a94c47e262283384043e25aede4bfe
parent4324f6de6d2eb9b232410eb0d67bfafdde8ba711 (diff)
mmc: sdhci: enable tuning for DDR50
CMD19 tuning is also available for DDR50 mode. Signed-off-by: Weijun Yang <york.yang@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-rw-r--r--drivers/mmc/host/sdhci.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 2cadf0891f15..b48565ed5616 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -1895,9 +1895,9 @@ static int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode)
tuning_count = host->tuning_count;
/*
- * The Host Controller needs tuning only in case of SDR104 mode
- * and for SDR50 mode when Use Tuning for SDR50 is set in the
- * Capabilities register.
+ * The Host Controller needs tuning in case of SDR104 and DDR50
+ * mode, and for SDR50 mode when Use Tuning for SDR50 is set in
+ * the Capabilities register.
* If the Host Controller supports the HS200 mode then the
* tuning function has to be executed.
*/
@@ -1917,6 +1917,7 @@ static int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode)
break;
case MMC_TIMING_UHS_SDR104:
+ case MMC_TIMING_UHS_DDR50:
break;
case MMC_TIMING_UHS_SDR50: