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authorMatthew Wilcox <matthew@wil.cx>2009-05-08 07:13:33 -0600
committerJesse Barnes <jbarnes@virtuousgeek.org>2009-05-11 17:02:27 -0700
commit8d181018532dd709ec1f789e374cda92d7b01ce1 (patch)
treeb693f6b993e7b324fe8cd3bee7d3e2d73c1c13bf
parent029091df01116aff8dea89ce96a0a2534401803a (diff)
PCI MSI: Fix MSI-X with NIU cards
The NIU device refuses to allow accesses to MSI-X registers before MSI-X is enabled. This patch fixes the problem by moving the read of the mask register to after MSI-X is enabled. Reported-by: David S. Miller <davem@davemloft.net> Tested-by: David S. Miller <davem@davemloft.net> Reviewed-by: David S. Miller <davem@davemloft.net> Signed-off-by: Matthew Wilcox <willy@linux.intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-rw-r--r--drivers/pci/msi.c8
1 files changed, 6 insertions, 2 deletions
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index 6f2e6295e773..362773247fbf 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -455,8 +455,6 @@ static int msix_capability_init(struct pci_dev *dev,
entry->msi_attrib.default_irq = dev->irq;
entry->msi_attrib.pos = pos;
entry->mask_base = base;
- entry->masked = readl(base + j * PCI_MSIX_ENTRY_SIZE +
- PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET);
msix_mask_irq(entry, 1);
list_add_tail(&entry->list, &dev->msi_list);
@@ -493,6 +491,12 @@ static int msix_capability_init(struct pci_dev *dev,
msix_set_enable(dev, 1);
dev->msix_enabled = 1;
+ list_for_each_entry(entry, &dev->msi_list, list) {
+ int vector = entry->msi_attrib.entry_nr;
+ entry->masked = readl(base + vector * PCI_MSIX_ENTRY_SIZE +
+ PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET);
+ }
+
return 0;
}