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authorThomas Gleixner <tglx@linutronix.de>2009-09-18 17:40:49 +0200
committerThomas Gleixner <tglx@linutronix.de>2009-09-18 17:40:49 +0200
commit82c07cbbdf7d44564497122eb6d984ffe2497fa3 (patch)
treeb096c80dfa40146f7f8e8918025ee3f981ac0d1b
parent0dfea57f1f486188303e598f96f0f92995bf9276 (diff)
x86: Disable SPARSE_IRQ, DMAR, INTR_REMAP when PREEMPT_RT=y
Memory allocations in irq/preempt disabled regions is the main cause of grief with these features. Needs some real work to get that solved. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
-rw-r--r--arch/x86/Kconfig4
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 2ddf28660323..bc240958bdac 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -281,6 +281,7 @@ config X86_X2APIC
config SPARSE_IRQ
bool "Support sparse irq numbering"
depends on PCI_MSI || HT_IRQ
+ depends on !PREEMPT_RT
---help---
This enables support for sparse irqs. This is useful for distro
kernels that want to define a high CONFIG_NR_CPUS value but still
@@ -1902,7 +1903,7 @@ config PCI_MMCONFIG
config DMAR
bool "Support for DMA Remapping Devices (EXPERIMENTAL)"
- depends on PCI_MSI && ACPI && EXPERIMENTAL
+ depends on PCI_MSI && ACPI && EXPERIMENTAL && !PREEMPT_RT
help
DMA remapping (DMAR) devices support enables independent address
translations for Direct Memory Access (DMA) from devices.
@@ -1945,6 +1946,7 @@ config DMAR_FLOPPY_WA
config INTR_REMAP
bool "Support for Interrupt Remapping (EXPERIMENTAL)"
depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI && EXPERIMENTAL
+ depends on !PREEMPT_RT
---help---
Supports Interrupt remapping for IO-APIC and MSI devices.
To use x2apic mode in the CPU's which support x2APIC enhancements or