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authorTimothy Pearson <tpearson@raptorengineeringinc.com>2016-02-26 15:29:32 -0600
committerSasha Levin <sasha.levin@oracle.com>2016-03-09 13:15:23 -0500
commitf0adda6a9f5b1689cbf47dd56cf73da201c014d8 (patch)
treeeb36401f9a1024fc4d5605a759c5bf2b9e8beaea
parentb8ad68546922dd5acb6cd32628bc9ae69a4795f9 (diff)
drm/ast: Fix incorrect register check for DRAM width
[ Upstream commit 2d02b8bdba322b527c5f5168ce1ca10c2d982a78 ] During DRAM initialization on certain ASpeed devices, an incorrect bit (bit 10) was checked in the "SDRAM Bus Width Status" register to determine DRAM width. Query bit 6 instead in accordance with the Aspeed AST2050 datasheet v1.05. Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Cc: stable@vger.kernel.org Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Sasha Levin <sasha.levin@oracle.com>
-rw-r--r--drivers/gpu/drm/ast/ast_main.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/ast/ast_main.c b/drivers/gpu/drm/ast/ast_main.c
index 035dacc93382..fd5c5f3370f6 100644
--- a/drivers/gpu/drm/ast/ast_main.c
+++ b/drivers/gpu/drm/ast/ast_main.c
@@ -227,7 +227,7 @@ static int ast_get_dram_info(struct drm_device *dev)
} while (ast_read32(ast, 0x10000) != 0x01);
data = ast_read32(ast, 0x10004);
- if (data & 0x400)
+ if (data & 0x40)
ast->dram_bus_width = 16;
else
ast->dram_bus_width = 32;