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authorHarvey Hunt <harvey.hunt@imgtec.com>2016-02-24 15:16:43 +0000
committerSasha Levin <sasha.levin@oracle.com>2016-03-09 13:15:10 -0500
commitd017f850a3b6f84e6d847c6cbb01eaf6ce61f4f6 (patch)
tree022247ebdb4689a15b407b1a6658755c9fec1061
parent15115bf3b764c4f2b36ea202f45181fd18d4a574 (diff)
libata: Align ata_device's id on a cacheline
[ Upstream commit 4ee34ea3a12396f35b26d90a094c75db95080baa ] The id buffer in ata_device is a DMA target, but it isn't explicitly cacheline aligned. Due to this, adjacent fields can be overwritten with stale data from memory on non coherent architectures. As a result, the kernel is sometimes unable to communicate with an ATA device. Fix this by ensuring that the id buffer is cacheline aligned. This issue is similar to that fixed by Commit 84bda12af31f ("libata: align ap->sector_buf"). Signed-off-by: Harvey Hunt <harvey.hunt@imgtec.com> Cc: linux-kernel@vger.kernel.org Cc: <stable@vger.kernel.org> # 2.6.18 Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Sasha Levin <sasha.levin@oracle.com>
-rw-r--r--include/linux/libata.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/linux/libata.h b/include/linux/libata.h
index e0e33787c485..11c2dd114732 100644
--- a/include/linux/libata.h
+++ b/include/linux/libata.h
@@ -717,7 +717,7 @@ struct ata_device {
union {
u16 id[ATA_ID_WORDS]; /* IDENTIFY xxx DEVICE data */
u32 gscr[SATA_PMP_GSCR_DWORDS]; /* PMP GSCR block */
- };
+ } ____cacheline_aligned;
/* DEVSLP Timing Variables from Identify Device Data Log */
u8 devslp_timing[ATA_LOG_DEVSLP_SIZE];