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authorRoger Quadros <rogerq@ti.com>2018-12-05 19:27:44 +0200
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2019-11-25 09:53:53 +0100
commit086270db26c6bb03eb4eab06172d4e1a8bcae2db (patch)
treedc25ce80609e713f075411ed7a99444399f8ee7c
parentc5e007b469c9b62807334504f79c3ca100a69a92 (diff)
ARM: dts: omap5: Fix dual-role mode on Super-Speed port
[ Upstream commit a763ecc15d0e37c3a15ff6825183061209832685 ] OMAP5's Super-Speed USB port has a software mailbox register that needs to be fed with VBUS and ID events from an external VBUS/ID comparator. Without this, Host role will not work correctly. Fixes: 656c1a65ab55 ("ARM: dts: omap5: enable OTG role for DWC3 controller") Reported-by: H. Nikolaus Schaller <hns@goldelico.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
-rw-r--r--arch/arm/boot/dts/omap5-board-common.dtsi1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/omap5-board-common.dtsi b/arch/arm/boot/dts/omap5-board-common.dtsi
index 3e9e3d90f2b4..e412373fe7bf 100644
--- a/arch/arm/boot/dts/omap5-board-common.dtsi
+++ b/arch/arm/boot/dts/omap5-board-common.dtsi
@@ -695,6 +695,7 @@
};
&dwc3 {
+ extcon = <&extcon_usb3>;
dr_mode = "otg";
};