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authorFabio Estevam <fabio.estevam@freescale.com>2013-07-04 20:01:03 -0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2013-07-28 16:18:25 -0700
commited8aac0dcdc333c2e3d1b49c098284be3d6d3421 (patch)
treed72392ad0b732c4ffab9f5ef08fd680a4373d59a
parent9ffff08f8af9f5a1773693f9bd05f9053aaab23d (diff)
ASoC: sglt5000: Fix SGTL5000_PLL_FRAC_DIV_MASK
commit 5c78dfe87ea04b501ee000a7f03b9432ac9d008c upstream. SGTL5000_PLL_FRAC_DIV_MASK is used to mask bits 0-10 (11 bits in total) of register CHIP_PLL_CTRL, so fix the mask to accomodate all this bit range. Reported-by: Oskar Schirmer <oskar@scara.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--sound/soc/codecs/sgtl5000.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/sound/soc/codecs/sgtl5000.h b/sound/soc/codecs/sgtl5000.h
index eec3ab368f39..b79eb80b9d3e 100644
--- a/sound/soc/codecs/sgtl5000.h
+++ b/sound/soc/codecs/sgtl5000.h
@@ -347,7 +347,7 @@
#define SGTL5000_PLL_INT_DIV_MASK 0xf800
#define SGTL5000_PLL_INT_DIV_SHIFT 11
#define SGTL5000_PLL_INT_DIV_WIDTH 5
-#define SGTL5000_PLL_FRAC_DIV_MASK 0x0700
+#define SGTL5000_PLL_FRAC_DIV_MASK 0x07ff
#define SGTL5000_PLL_FRAC_DIV_SHIFT 0
#define SGTL5000_PLL_FRAC_DIV_WIDTH 11