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authorAndi Kleen <ak@suse.de>2005-10-11 01:28:33 +0200
committerLinus Torvalds <torvalds@g5.osdl.org>2005-10-10 16:34:09 -0700
commit3c92c2ba33cd7d666c5f83cc32aa590e794e91b0 (patch)
treebecef856504063805545afbed00247e384309e06
parent421c7ce6d001fce28b1fa8fdd2e7ded0ed8a0ad5 (diff)
[PATCH] i386: Don't discard upper 32bits of HWCR on K8
Need to use long long, not long when RMWing a MSR. I think it's harmless right now, but still should be better fixed if AMD adds any bits in the upper 32bit of HWCR. Bug was introduced with the TLB flush filter fix for i386 Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
-rw-r--r--arch/i386/kernel/cpu/amd.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/i386/kernel/cpu/amd.c b/arch/i386/kernel/cpu/amd.c
index 4c1ddf2b57cc..53a1681cd964 100644
--- a/arch/i386/kernel/cpu/amd.c
+++ b/arch/i386/kernel/cpu/amd.c
@@ -29,7 +29,7 @@ static void __init init_amd(struct cpuinfo_x86 *c)
int r;
#ifdef CONFIG_SMP
- unsigned long value;
+ unsigned long long value;
/* Disable TLB flush filter by setting HWCR.FFDIS on K8
* bit 6 of msr C001_0015