Home Home > GIT Browse
summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorThomas Zimmermann <tzimmermann@suse.de>2019-05-14 09:15:19 +0200
committerThomas Zimmermann <tzimmermann@suse.de>2019-05-14 09:59:44 +0200
commit25e583cd95975669790bef940dd4551462e15e22 (patch)
tree799085541ccf3386c5741ac3ba55bc1955a3bf2a
parent287e07ed204e5beb4cff3196ac6c01159172d228 (diff)
drm/i915/gvt: Fix incorrect mask of mmio 0x22028 in gen8/9 mmio list (bnc#1113722)
-rw-r--r--patches.drm/0004-drm-i915-gvt-Fix-incorrect-mask-of-mmio-0x22028-in-g.patch39
-rw-r--r--series.conf1
2 files changed, 40 insertions, 0 deletions
diff --git a/patches.drm/0004-drm-i915-gvt-Fix-incorrect-mask-of-mmio-0x22028-in-g.patch b/patches.drm/0004-drm-i915-gvt-Fix-incorrect-mask-of-mmio-0x22028-in-g.patch
new file mode 100644
index 0000000000..63913ed9a6
--- /dev/null
+++ b/patches.drm/0004-drm-i915-gvt-Fix-incorrect-mask-of-mmio-0x22028-in-g.patch
@@ -0,0 +1,39 @@
+From 2bfc4975083ace0e5777116514c3a75e59b3dbcd Mon Sep 17 00:00:00 2001
+From: Colin Xu <colin.xu@intel.com>
+Date: Mon, 1 Apr 2019 14:13:53 +0800
+Subject: drm/i915/gvt: Fix incorrect mask of mmio 0x22028 in gen8/9 mmio list
+Git-commit: 2bfc4975083ace0e5777116514c3a75e59b3dbcd
+Patch-mainline: v5.2-rc1
+References: bnc#1113722
+
+According to GFX PRM on 01.org, bit 31:16 of mmio 0x22028 should be masks.
+
+Fixes: 178657139307 ("drm/i915/gvt: vGPU context switch")
+Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
+Signed-off-by: Colin Xu <colin.xu@intel.com>
+Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
+Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
+---
+ drivers/gpu/drm/i915/gvt/mmio_context.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/i915/gvt/mmio_context.c
++++ b/drivers/gpu/drm/i915/gvt/mmio_context.c
+@@ -79,7 +79,7 @@ static struct engine_mmio gen8_engine_mm
+ {BCS, RING_MI_MODE(BLT_RING_BASE), 0xffff, false}, /* 0x2209c */
+ {BCS, RING_INSTPM(BLT_RING_BASE), 0xffff, false}, /* 0x220c0 */
+ {BCS, RING_HWSTAM(BLT_RING_BASE), 0x0, false}, /* 0x22098 */
+- {BCS, RING_EXCC(BLT_RING_BASE), 0x0, false}, /* 0x22028 */
++ {BCS, RING_EXCC(BLT_RING_BASE), 0xffff, false}, /* 0x22028 */
+ {RCS, INVALID_MMIO_REG, 0, false } /* Terminated */
+ };
+
+@@ -130,7 +130,7 @@ static struct engine_mmio gen9_engine_mm
+ {BCS, RING_MI_MODE(BLT_RING_BASE), 0xffff, false}, /* 0x2209c */
+ {BCS, RING_INSTPM(BLT_RING_BASE), 0xffff, false}, /* 0x220c0 */
+ {BCS, RING_HWSTAM(BLT_RING_BASE), 0x0, false}, /* 0x22098 */
+- {BCS, RING_EXCC(BLT_RING_BASE), 0x0, false}, /* 0x22028 */
++ {BCS, RING_EXCC(BLT_RING_BASE), 0xffff, false}, /* 0x22028 */
+
+ {VCS2, RING_EXCC(GEN8_BSD2_RING_BASE), 0xffff, false}, /* 0x1c028 */
+
diff --git a/series.conf b/series.conf
index 4636daeef0..335c5dd47a 100644
--- a/series.conf
+++ b/series.conf
@@ -21816,6 +21816,7 @@
patches.drm/0001-drm-sun4i-rgb-Change-the-pixel-clock-validation-chec.patch
patches.drm/drm-i915-Fix-I915_EXEC_RING_MASK.patch
patches.drm/drm-fb-helper-dpms_legacy-Only-set-on-connectors-in-.patch
+ patches.drm/0004-drm-i915-gvt-Fix-incorrect-mask-of-mmio-0x22028-in-g.patch
patches.drm/drm-rockchip-shutdown-drm-subsystem-on-shutdown.patch
patches.drivers/ALSA-timer-Unify-timer-callback-process-code.patch
patches.drivers/ALSA-timer-Make-sure-to-clear-pending-ack-list.patch