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authorTakashi Iwai <tiwai@suse.de>2019-06-19 15:14:46 +0200
committerTakashi Iwai <tiwai@suse.de>2019-06-19 15:14:51 +0200
commita31492b4a778cfdd60caadb96cede67904fb2e21 (patch)
treedc2c0a063bfaffe37b3f132a394925cf781bdd00
parent6591dfa86d3fe86481a606d5d58b9a8a20b92255 (diff)
soc: rockchip: Set the proper PWM for rk3288 (bsc#1051510).
-rw-r--r--patches.drivers/soc-rockchip-Set-the-proper-PWM-for-rk3288.patch57
-rw-r--r--series.conf1
2 files changed, 58 insertions, 0 deletions
diff --git a/patches.drivers/soc-rockchip-Set-the-proper-PWM-for-rk3288.patch b/patches.drivers/soc-rockchip-Set-the-proper-PWM-for-rk3288.patch
new file mode 100644
index 0000000000..a4a6078842
--- /dev/null
+++ b/patches.drivers/soc-rockchip-Set-the-proper-PWM-for-rk3288.patch
@@ -0,0 +1,57 @@
+From bbdc00a7de24cc90315b1775fb74841373fe12f7 Mon Sep 17 00:00:00 2001
+From: Douglas Anderson <dianders@chromium.org>
+Date: Tue, 9 Apr 2019 13:49:05 -0700
+Subject: [PATCH] soc: rockchip: Set the proper PWM for rk3288
+Git-commit: bbdc00a7de24cc90315b1775fb74841373fe12f7
+Patch-mainline: v5.2-rc1
+References: bsc#1051510
+
+The rk3288 SoC has two PWM implementations available, the "old"
+implementation and the "new" one. You can switch between the two of
+them by flipping a bit in the grf.
+
+The "old" implementation is the default at chip power up but isn't the
+one that's officially supposed to be used. ...and, in fact, the
+driver that gets selected in Linux using the rk3288 device tree only
+supports the "new" implementation.
+
+Long ago I tried to get a switch to the right IP block landed in the
+PWM driver (search for "rk3288: Switch to use the proper PWM IP") but
+that got rejected. In the mean time the grf has grown a full-fledged
+driver that already sets other random bits like this. That means we
+can now get the fix landed.
+
+For those wondering how things could have possibly worked for the last
+4.5 years, folks have mostly been relying on the bootloader to set
+this bit. ...but occasionally folks have pointed back to my old patch
+series [1] in downstream kernels.
+
+[1] https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1391597.html
+
+Signed-off-by: Douglas Anderson <dianders@chromium.org>
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+Acked-by: Takashi Iwai <tiwai@suse.de>
+
+---
+ drivers/soc/rockchip/grf.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/drivers/soc/rockchip/grf.c b/drivers/soc/rockchip/grf.c
+index 96882ffde67e..3b81e1d75a97 100644
+--- a/drivers/soc/rockchip/grf.c
++++ b/drivers/soc/rockchip/grf.c
+@@ -66,9 +66,11 @@ static const struct rockchip_grf_info rk3228_grf __initconst = {
+ };
+
+ #define RK3288_GRF_SOC_CON0 0x244
++#define RK3288_GRF_SOC_CON2 0x24c
+
+ static const struct rockchip_grf_value rk3288_defaults[] __initconst = {
+ { "jtag switching", RK3288_GRF_SOC_CON0, HIWORD_UPDATE(0, 1, 12) },
++ { "pwm select", RK3288_GRF_SOC_CON2, HIWORD_UPDATE(1, 1, 0) },
+ };
+
+ static const struct rockchip_grf_info rk3288_grf __initconst = {
+--
+2.16.4
+
diff --git a/series.conf b/series.conf
index 60324553d4..f79066ead7 100644
--- a/series.conf
+++ b/series.conf
@@ -22467,6 +22467,7 @@
patches.drm/drm-bridge-adv7511-Fix-low-refresh-rate-selection.patch
patches.drivers/thermal-cpu_cooling-Actually-trace-CPU-load-in-therm.patch
patches.drivers/soc-mediatek-pwrap-Zero-initialize-rdata-in-pwrap_in.patch
+ patches.drivers/soc-rockchip-Set-the-proper-PWM-for-rk3288.patch
patches.suse/objtool-fix-function-fallthrough-detection.patch
patches.arch/x86-speculation-mds-revert-cpu-buffer-clear-on-double-fault-exit.patch
patches.fixes/configfs-fix-possible-use-after-free-in-configfs_reg.patch