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authorBorislav Petkov <bp@suse.de>2018-11-19 16:31:58 +0100
committerBorislav Petkov <bp@suse.de>2018-11-19 18:17:25 +0100
commit83998800a0a015969dac1c499e3b3821023a7134 (patch)
treec65e4324514f527b0cb665faa2525a3d2df4f3a6
parent1b58eaeff145136da2008471a79ac3c7e42958dd (diff)
Provide a temporary fix for STIBP on-by-defaultSLE12-SP3
See bsc#1116497 for details. - Refresh patches.arch/x86-speculation-propagate-information-about-rsb-filling-mitigation-to-sysfs.patch. - Refresh patches.suse/x86-fix-ibrs-reporting.patch. Signed-off-by: Borislav Petkov <bp@suse.de> suse-commit: 977ce66ce9b488e61eb30b0e232ea2169d0bd52a
-rw-r--r--arch/x86/kernel/cpu/bugs.c53
-rw-r--r--kernel/cpu.c11
2 files changed, 7 insertions, 57 deletions
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index 872062304b61..4e5325bc69e9 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -34,10 +34,12 @@ static void __init spectre_v2_select_mitigation(void);
static void __init ssb_select_mitigation(void);
static void __init l1tf_select_mitigation(void);
-/* The base value of the SPEC_CTRL MSR that always has to be preserved. */
+/*
+ * Our boot-time value of the SPEC_CTRL MSR. We read it once so that any
+ * writes to SPEC_CTRL contain whatever reserved bits have been set.
+ */
u64 x86_spec_ctrl_base;
EXPORT_SYMBOL_GPL(x86_spec_ctrl_base);
-static DEFINE_MUTEX(spec_ctrl_mutex);
/*
* The vendor and possibly platform specific bits which can be modified in
@@ -344,46 +346,6 @@ static enum spectre_v2_mitigation_cmd __init spectre_v2_parse_cmdline(void)
return cmd;
}
-static bool stibp_needed(void)
-{
- if (spectre_v2_enabled == SPECTRE_V2_NONE)
- return false;
-
- if (!boot_cpu_has(X86_FEATURE_STIBP))
- return false;
-
- return true;
-}
-
-static void update_stibp_msr(void *info)
-{
- wrmsrl(MSR_IA32_SPEC_CTRL, x86_spec_ctrl_base);
-}
-
-void arch_smt_update(void)
-{
- u64 mask;
-
- if (!stibp_needed())
- return;
-
- mutex_lock(&spec_ctrl_mutex);
- mask = x86_spec_ctrl_base;
- if (cpu_smt_control == CPU_SMT_ENABLED)
- mask |= SPEC_CTRL_STIBP;
- else
- mask &= ~SPEC_CTRL_STIBP;
-
- if (mask != x86_spec_ctrl_base) {
- pr_info("Spectre v2 cross-process SMT mitigation: %s STIBP\n",
- cpu_smt_control == CPU_SMT_ENABLED ?
- "Enabling" : "Disabling");
- x86_spec_ctrl_base = mask;
- on_each_cpu(update_stibp_msr, NULL, 1);
- }
- mutex_unlock(&spec_ctrl_mutex);
-}
-
/* Check for Skylake-like CPUs (for IBRS handling) */
static bool __init is_skylake_era(void)
{
@@ -496,9 +458,6 @@ retpoline_auto:
setup_force_cpu_cap(X86_FEATURE_USE_IBRS_FW);
pr_info("Enabling Restricted Speculation for firmware calls\n");
}
-
- /* Enable STIBP if appropriate */
- arch_smt_update();
}
#undef pr_fmt
@@ -898,14 +857,14 @@ static ssize_t cpu_show_common(struct device *dev, struct device_attribute *attr
return sprintf(buf, "Mitigation: __user pointer sanitization\n");
case X86_BUG_SPECTRE_V2:
- ret = sprintf(buf, "%s%s%s%s%s%s\n",
+ ret = sprintf(buf, "%s%s%s%s%s\n",
(x86_ibrs_enabled() ? "Mitigation: IBRS+IBPB"
: spectre_v2_strings[spectre_v2_enabled]),
boot_cpu_has(X86_FEATURE_USE_IBPB) && x86_ibpb_enabled() ? ", IBPB" : "",
boot_cpu_has(X86_FEATURE_USE_IBRS_FW) ? ", IBRS_FW" : "",
- (x86_spec_ctrl_base & SPEC_CTRL_STIBP) ? ", STIBP" : "",
boot_cpu_has(X86_FEATURE_RSB_CTXSW) ? ", RSB filling" : "",
spectre_v2_module_string());
+
return ret;
case X86_BUG_SPEC_STORE_BYPASS:
diff --git a/kernel/cpu.c b/kernel/cpu.c
index 27a17d7e9daa..b5881209b0d8 100644
--- a/kernel/cpu.c
+++ b/kernel/cpu.c
@@ -950,12 +950,6 @@ static void cpuhp_online_cpu_device(unsigned int cpu)
kobject_uevent(&dev->kobj, KOBJ_ONLINE);
}
-/*
- * Architectures that need SMT-specific errata handling during SMT hotplug
- * should override this.
- */
-void __weak arch_smt_update(void) { };
-
static int cpuhp_smt_disable(enum cpuhp_smt_control ctrlval)
{
int cpu, ret = 0;
@@ -982,10 +976,8 @@ static int cpuhp_smt_disable(enum cpuhp_smt_control ctrlval)
*/
cpuhp_offline_cpu_device(cpu);
}
- if (!ret) {
+ if (!ret)
cpu_smt_control = ctrlval;
- arch_smt_update();
- }
cpu_maps_update_done();
return ret;
}
@@ -996,7 +988,6 @@ static int cpuhp_smt_enable(void)
cpu_maps_update_begin();
cpu_smt_control = CPU_SMT_ENABLED;
- arch_smt_update();
for_each_present_cpu(cpu) {
/* Skip online CPUs and CPUs on offline nodes */
if (cpu_online(cpu) || !node_online(cpu_to_node(cpu)))